Cover Page



1 Design and Performances of UHF Tag Integrated Circuits

1.1. Introduction

1.2. Integrated circuit architecture

1.3. RF to DC conversion: modeling the system

1.4. RF to DC conversion: proposed circuits and performances

1.5. Voltage limiter and regulator

1.6. Demodulator

1.7. Oscillator

1.8. Modulator

1.9. Digital blocks

1.10. Technology, performances and trends

1.11. Bibliography

2 Design of UHF RFID Tags

2.1. Tag antenna design

2.2. Matching between the antenna impedance and the microchip impedance

2.3. RFID tag antennas using an inductively coupled feed

2.4. Combined RFID tag antenna for recipients containing liquids

2.5. Tag on metal

2.6. Bibliography

3 The Backscattering Technique and its Application

3.1. Backscattering principle of communication by between-base station and tag

3.2. The merit factor of a tag, Δσe s or ΔRCS

3.3. Variations of Δσe s = f(a)

3.4. After the theory, RFID at UHF and SHF realities

3.5. Measuring ΔRCS

3.6. The “Radar” equation

3.7. Appendix: summary of the principal formulas

4 RFID Markets

4.1. Introduction

4.2. Market inflection point: users

4.3. RFID: what for?

4.4. Open-and closed-loop applications

4.5. RFID return on investment

4.6. Many RFID technologies

4.7. Examples

4.8. Next RFID: product-embedded and seamless infrastructure






To Tanguy Laheurte, student in telecommunication engineering at Telecom Bretagne


Passive ultra high frequency (UHF) radio frequency identification (RFID) is an electronic tagging technology commercialized between 860 and 960 MHz that allows an object or person to be automatically identified at a distance of up to 10 m without a direct line-of-sight path using a radar-type radio wave exchange (Figure I.1). UHF is the dominant technology for supply chain management applications such as case and pallet tracking and returnable container identification. It is also widely used for real-time inventory, industrial automation, work-in-process tracking, asset management, forklift monitoring, personal identification (ID), vehicle access control, document security and authentication. There are numerous UHF standards, most notably ISO 18000-6 and EPCglobal Gen 2, which are the most widely supported RFID standards nowadays.

Figure I.1. Functional principle of a UHF RFID communication. images Inlay attached to the item: substrate film onto which the antenna and the chip containing item data are combined. images Radio frequency emitted by the reader installed on a gate, a cashier counter, etc. images The tag sends the data in response to the radio frequency (backscattering modulation). images The reader antenna transmits the modulated data to the reader. images The reader decodes the data and sends it to the host computer


Today, many bar code processes involve bringing the bar-coded object to the reader and orienting the bar code for proper presentation to the reader. As a result, conveyor systems must run considerably slower than their top speeds so that bar code readers can identify passing objects. Unlike a bar code, the RFID tag does not necessarily need to be within the line of sight of the reader and it may be embedded into the tracked object. Moreover, RFID has the ability to identify multiple objects simultaneously. These are the important advantages of RFID over bar code technology, since they eliminate much of the labor currently required and increase the reading speeds.

Apart from the frequency, the main difference between high frequency (HF) and UHF RFID technologies is their read/write distance. The maximum distance for HF technology at 13.56 MHz is approximately 1 m and the maximum distance for UHF technology is approximately 10 m. When long read distances are required, 13.56 MHz technology is not an option: HF antennas do not radiate as their length is very small compared to the wavelength with an almost zero radiation resistance. HF antennas must be seen as near H-field sensors. Most UHF systems communicate by radio waves that provide longer distance. However, UHF systems can also work at close distance and one can find commercialized near-field UHF systems optimized for short-range reading. The same tags that can be read from a 10 m distance can also be read from 10 cm. For instance, UHF technologies can simultaneously satisfy requirements for short-range reading at assembly stations and long-range storage, shipping and receiving processes. UHF systems are then optimized for various processes and reading distances through the placement and configuration of readers.

In early deployments, the UHF systems suffered from performance degradation when used around liquid and metal compared to HF solutions. Advances in antenna design, reader tuning and best practices have overcome this limitation. For example, some UHF tags have been designed specifically for use in close proximity to metal and to take advantage of the conductive properties of the metal to enhance the RF performance. The idea that HF technology is required for use around metal and liquid is nowadays more of a perception than a reality. In supply chain applications, UHF is frequently used to successfully identify cases and entire pallets of consumer goods with high liquid or metal content.

The purpose of this book is not to be exhaustive but to focus on specific aspects of passive UHF RFID technologies. Its first objective is to provide a reference document on the tag antenna design and chip technologies, either from up-to-date academic papers, industrial data or author experience. The second objective is to include perspectives on end users, market and production. Nevertheless, important UHF RFID topics such as the architecture of the readers, the ISO 18000-6 air interface protocol standard and the worldwide regulations are beyond the scope of this book.

The book is organized as follows:

– Chapter 1: Design and performances of UHF RFID integrated circuits (C. Ripoll);
– Chapter 2: Design of UHF RFID antennas and tags (J.M. Laheurte);
– Chapter 3: Design methodology as a function of RCS and DeltaRCS, consequences on the near-field/far-field issues (D. Paret);
– Chapter 4: Markets, applications and end users (C. Loussert).

Chapter 1 provides an up-to-date state of the art in technologies and performances of UHF RFID integrated circuits (ICs). This includes the direct current (DC) voltage supply generation circuit and its regulator, the demodulator part to recover the data, the on-board oscillator to control the digital part and the organization of this digital part and memory. The focus is on the EPC Gen2 protocol adopted in the ISO 18000 Part 6. This added to a full description of the IC functionalities, fabrication issues, matching requirements and measurement tests and benchmarks should help chip designers to identify the main constraints of the technology.

Chapter 2 highlights the design and manufacturing issues of RFID tags. The antenna miniaturization on inexpensive materials is only one of several problems that a designer needs to solve. Tracking fluxes of goods between different companies and across the world must be performed with good read performance despite a close environment characterized by disturbances (associated items, other tags, surrounding objects, etc.). This can only be done if the tag design follows several rules, one of them being the wideband impedance matching to the RFID IC. Another rule is to limit the tag sensitivity to the environment by including the dielectric, conductivity and shape features of the tagged item in the analysis in order to take advantage of it or to fight against it.

As most UHF RFID tags are dipole-based structures, Chapter 2 first describes the fundamental circuit parameters of the dipole antenna (input impedance, radiation resistance, efficiency, Q-factor and impedance). The miniaturization strategies based on fat dipoles, tip loading and meanders are then presented followed by a description of the influence of the dielectric and metallic environments on the tag performance. The fundamental problem of impedance matching between the RFID chip and the antenna is clearly stated with a careful explanation of the single- and double-tuned matching strategies. It is demonstrated that the wide bandwidth characteristic of double-tuned matching circuit is crucial in the presence of dielectrics. Inductively coupled fed tag antennas, as well as the associated commercial loop-based modules, are also extensively detailed. Examples of their use on either filled or empty recipients are given. To conclude this chapter, a state of the art for tags on metal is proposed. Thin and thick structures are examined in succession.

In Chapter 3, special emphasis is put on the design methodology as a function of the radar cross section (RCS) and DeltaRCS with consequences on the near- field/far-field communications.

Chapter 4 is an overview of UHF RFID challenges including the applications, markets, trades and basic technologies, more specifically in the supply chain management and the retail inventory. It is demonstrated that return-on investment (ROI) is key to the RFID buying decision process. RFID technology must generate cost reduction and sales increase to trigger the associated investment. Key topics of future RFID are also detailed: use of tags throughout the whole product life, smart embedded RFID solutions, seamless and ubiquitous infrastructures, and future softwares in massive networks of small intelligent devices.


Design and Performances of UHF Tag Integrated Circuits

Design of UHF RFID tag IC presents unique design challenges to satisfy constraints due mostly to the remote biaising of the batteryless tag. After a brief introduction (section 1.1) and a presentation of the architecture (section 1.2) of a tag IC, section 1.3 will show the principles of converting RF into DC via voltage multipliers successively; first in the ideal then in the real case. The end of the section will deal with the influence of the active element (the diode or the MOSFET, a comparison between the two will highlight the pros and cons of each) and passive parasitics that must be taken into account during the dimensioning of the intermediate and the output capacitors. A simplified model of the antenna and the input of the rectifier will allow us to see the importance of matching and will lead to the computation of the Power Conversion Efficiency (PCE) of the circuit. Sections 1.4 and 1.5 propose a few up-to-date circuits with careful design to reduce the threshold voltage of the active element and improve the PCE. Sections 1.6, 1.7 and 1.8 rather briefly discuss the problem of exchanging information between the reader and the tag and the improvements on the oscillator design to reduce overall consumption. Sections 1.9 and 1.10 list the latest technologies, techniques and trends used in the digital part and lists of performances of the different teams are compared.

1.1. Introduction

The ratification of the global ultra high frequency (UHF) passive radio frequency identification (RFID) standard ISO18000-6 has stimulated the interests of many research laboratories, prompting them to carry out research and development work on the UHF power rectifiers at the microwatt level. In fact, micropower rectifiers are not only limited to RFID but also useful in energy-scavenging modules for remote sensor applications [TEH 09].

The design of an integrated circuit for a UHF RFID tag is not a simple task because it requires numerous constraints to be taken into account.

The primary characteristics of an RFID tag are the cost, the communication range between the tag and the reader/writer, and the transaction time associated with the system performance. To minimize the cost, the tag should be manufactured with the tag integrated circuit (IC) and the associated antenna in a simple process; we will see later that the design rules imply both parts and then each part cannot be designed independently of the other. Despite its simple passive structure, an RFID tag should provide value-added services enabling specific RFID functions, such as data writing, the storing of historical manufacturing or distribution process data, and anticollision reads to speed up the inventory search or security functions to authenticate users [NAK 07].

First, as mentioned above, we must end up with a product for which the cost, so as not to be prohibitive for the retail RFID transponder, should be targeted at being only a few cents. Because the cost of the IC is an important part of the overall cost, it implies the choice of low-cost very large-scale integration (VLSI) technologies, which do not correspond to the best choice for some problematic designs such as the design of the rectifier. Then, a tag IC designer must deal with the challenges of low supply voltage, very low consumption, high input power dynamic range and efficient antenna matching. Because the read range is set by the forward link in a passive backscattering UHF RFID system, it means that the minimum turn-on power for the RF IC chip is of prime importance among the constraints.

A few manufacturers jealously guard their secrets about the design and fabrication process. They sell commercial products with performances as good as the ones displayed by the research laboratories. Some topics such as the optimal choice of the shunt resistor that enables the control of the received power from the far-field to the near-field are not available in the current literature but are actually implanted in certain products. This chapter aims to understand the design principles of the tag integrated circuit, especially the voltage multiplier. Some performances of the power conversion efficiency are also given with respect to different technologies and circuit topologies.

1.2. Integrated circuit architecture

A typical block diagram of a complete passive transponder architecture, including the IC and the matched antenna, is shown in Figure 1.1. Usually, we distinguish between the front-end, which is constituted of the direct current (DC) supply generation, the demodulator and the modulator and the digital part, which includes the control logic, and the electronically erasable and programmable read-only memory (EEPROM) with its charge pump.

The transponder must draw the power required for its functioning from the received electromagnetic field. This power is used mainly by the digital section (often up to 70%) and by the front-end to receive the data sent by the reader and to allow data transmission from the tag to the reader through backscattering modulation.

The regulator circuit stabilizes the output voltage of the multiplier, but it may also keep the input voltage of the multiplier below the breakdown voltage in case of a tag being close to the base station. The voltage reference is sometimes called bandgap reference and output necessary voltages (and currents sometimes) for protection (used by regulator, for example).

1.3. RF to DC conversion: modeling the system

There are two important goals for achieving high power efficiency of the transponder. The efficiency is defined as the ratio between the RF power available at the transponder’s antenna and the DC power at the output of the DC block for supplying the transponder. The first goal is the power matching between the antenna and the IC, and the second goal is the RF to DC conversion taking into account the output load constraints, namely a minimum DC voltage to operate the transponder and a minimum load current drawn by the IC (so even if the definition mentions the output power, it is important to note [BAR 09] that each parameter must be independently satisfied). So, one of the big challenges a designer must face is the design of the rectifier with high efficiency while maintaining a minimum DC output voltage and current to supply the transponder.

Figure 1.1. Architecture of a passive RFID transponder


1.3.1. Determination of the ideal DC output voltage

For UHF RFID applications requiring several meters of communication distance, the incoming signal level is only a few hundreds of mV when minimum sensitivity is considered. Therefore, only a multistage rectifier can deal with these requirements and it is used. The topology used by Dickson in 1976 has only been slightly changed by Karthaus and Fischer [KAR 03] in order to make it useful for the alternating current (AC)/DC conversion as shown in Figure 1.3.

The received AC input voltage is converted to a DC output voltage by the voltage multiplier, which is then stabilized and maintained within limits by the voltage regulator [DEV 05].

The elementary cell is built from the clamping circuit C-D1 (see Figure 1.2(a)), which shifts the negative portion of the input signal above zero by storing the equivalent electric charge on the output terminal of C1 by the charging current circulating from ground to IN through the D1 diode. Then, the rectifier circuit detects the peak value of the output signal of the clamp circuit. The electric charge previously stored is now delivered to the output capacity Cout by the charging current circulating through D2. When considering ideal elements, we can write the voltage at the output of the clamp circuit [CUR 07]:

[1.1] images

where images is the peak value of Vin(t), voltage at the input of the multiplier. So, in this idealized model, the maximum possible voltage at the output of the clamp circuit is 2images. At the output of the rectifier circuit, this value is maintained by the parallel charged capacitor Cout.

In the real case, this value is reduced by the voltage drop of the diode.

[1.2] images

where Vd is the diode drop voltage.

Besides, this value is further reduced due to imperfections of the circuit elements like the leakage current of the capacitor, the parasitic parallel resistor and the reverse current of the diode.

The half-wave voltage doubler is obtained by cascading the two circuits as illustrated in Figure 1.2(a).

To take advantage of both polarities of the input signal, we must use the full-wave voltage doubler as illustrated in Figure 1.2(b). This implies that the following voltage regulator is able to receive a differential input.

To reach the necessary output voltage (which depends on the complementary metal oxide semiconductor (CMOS) technology used but is actually approximately 1.2 V) when the tag is in the far-end, it is mandatory to use an N-stage multiplier, which consists of a cascade of N elementary cells.

Figure 1.2. Elementary cell of an N-stage multiplier: a) half-wave voltage doubler and b) full-wave voltage doubler


Figure 1.3. N-stage half-wave voltage multiplier and voltage regulator


Then the voltage generated between the input and the output for an N-stage half-wave multiplier is:

[1.3] images

In the DC analysis, capacitors act as open circuits, so we now have 2N identical diodes in series; so the voltage drop across each diode may be written with respect to time as:

[1.4] images

1.3.2. Determination of the “real” DC voltage

Actually, equation [1.3] is a crude approximation because the threshold voltage is considered as constant. In fact, it depends on the direct current Id and saturation current Is through an exponential law between current and voltage for the Schottky diode (or a square law in the case of a diode-connected MOS); so we have a forward diode drop that is logarithmically dependent on the diode current, which is actually the load current:

[1.5] images

where η is the diode non-ideality factor. So, it should be rewritten as equation [1.6] to take into account this dependency but also the choice of the technology through the saturation current:

[1.6] images

In UHF RFID applications, the amplitude of the input voltage is rather weak and the diode operates in a region where the voltage drop depends strongly on the current as shown in Figure 1.4.

Figure 1.4. Diode operational regions for Dickson’s original analysis and for UHF RFID application (after [BAR 09])


For example, if IS is 200 nA and the current through the diode varies from 2 to 4 μA, then the voltage drop will vary from 60 to 75 mV.

The diode current has a pulsed shape due to the nonlinear relationship (equation [1.5]) as shown by some simulations [BAR 09] in Figure 1.5 for a coupling capacitor of 1.2 pF, an output capacitor of 12 pF and a diode saturation current of 120 nA.

Figure 1.5. Voltages and currents for the Schottky diode doubler in steady-state conditions (after [BAR 09])


As can be seen, the threshold voltage cannot be neglected because it represents a drop approximately 100 mV (depending on the DC), which is of the same order of the amplitude of the input voltage. It is important to find the threshold voltage precisely because a small variation in it gets multiplied by the number of stages, which can significantly change the DC-generated output.

The output of the rectifier could be considered as a current source, whose value is determined by the current consumption of the IC. This means that, because of the charge conservation, the average value of the instantaneous current over one conduction cycle is equal to the load current drawn from the output, that is Iout equals 3.4 μA for this example [BAR 09]. So, if the output (or load) current increases, the peak current also increases to allow the increase of the average current as shown in equation [1.7]:

[1.7] images

Similarly, if the input voltage increases, the peak diode current will increase as well, and thus the pulse shape will change.

So, from the viewpoint of the DC output generated, the voltage drop in the diode depends on the input voltage and the output current drawn. In fact, because of the way the rectifier works, the threshold voltage is determined only at the peak of the current images.

So, the DC output voltage should finally be expressed by:

[1.8] images

Based on the development of the relationship between current and voltage with modified Bessel function series of the exponential of a cosine function, some authors like De Vita and Iannaccone [DEV 05] establish a general N-stage rectifier input–output relationship that can be solved as:

[1.9] images

Here, we clearly see that a designer can decide to choose Vout as the objective output parameter, leaving Iout as a dependant variable [TEH 09].

1.3.3. Effects of parasitics and capacitances on the output voltage

So far, we have only taken into account the threshold voltage as the main parameter to determine the DC output voltage but, in fact, other parameters can have a secondary influence, namely parameters of the diode model, the coupling and hold capacitors.

First, we need to know what the non-idealities are and where the parasitics for each element of the rectifier are. Active elements parasitics

For the charge transfer devices acting as a switch, the designer has the choice between the Schottky diode, first introduced by Karthaus and Fischer in 2003 [KAR 03], and the diode-connected metal oxide semiconductor field effect transistor (MOSFET). For the latter, many alternate solutions have appeared such as the use of native transistor, special biasing circuitry, threshold programming by analog memory or the dynamic threshold MOSFET [TEH 09].